Programme
September 21st, 2010
| 09h15 | - | Opening |
| Session 1 | ||
| 09h30 | - | Realizability of real-time logics: decidability and implementation, L. Doyen, B. Di Giampaolo, G. Geeraerts, J.-F. Raskin, J. Reichert and N. Sznajder |
| 10h00 | - | Decidable Distributed Event Clock Automata, J. J. Ortiz and P.-Y. Schobbens |
| 10h30 | - | Coffee break |
| Session 2 | ||
| 11h00 | - | Invited Speaker: Rupak Majumdar, UCLA |
| 12h00 | - | Implementing High-Level Languages for Software Product Line Model Checking, A. Classen, P. Heymans, A. Legay and P.-Y. Schobbens |
| 12h30 | - | Lunch break |
| Session 3 | ||
| 14h00 | - | Combining Partial Order Reduction and Symbolic Model Checking to verify LTL properties, J. vander Meulen |
| 14h30 | - | Parameterized Verification of Ad Hoc Networks, A. Sangnier |
| 15h00 | - | Symbolic Analysis of Concurrent Programs with Polymorphism, N. S. Rungta |
| 15h30 | - | Coffee Break |
| Session 4 | ||
| 16h00 | - | Modular Lightweight Semantics, K. Madlener, S. Smetsers and M. van Eekelen |
| 16h30 | - | Evolutions of Test Systems, P. Y. H. Wong and N. Diakov |
| 17h00 | - | Closing |